Real-time Synchrophasor Data Compression Technique with Phasor Interpolation and Extrapolation

To completely eliminate the time delays caused by phasor data compressions for real-time synchrophasor applications, a compression (RSDC) is proposed in this paper. The two-way rotation characteristic and elliptical trajectory of dynamic synchrophasors are introduced first to enhance along with fast solving method fitting equations. RSDC reconstruction then combining interpolation extrapolation compressions. verified both actual measurement recorded two-phase short-circuit incident subsynchronous oscillation incident, synthetic synchrophasors. It also compared two previous techniques, i.e., swing door trending (PSDT) exception (SDT) (ESDC). verification results demonstrate that can achieve significantly higher ratios offline applications zero-delay simultaneously.